HOD (Electronics & Telecommunication Department)
Personal Details |
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Full Name: |
Prof. Dr Tejmal S. Rathore |
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Designation: |
Dean R&D, Professor, HOD EXTC Department |
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Email Id |
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Qualification:
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Experience : |
Teaching |
46 years |
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Research |
40 years |
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Professional Details |
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Date of joining : |
01/07/2006 as a Dean R&D and Head of EXTC Dept |
Area of expertise : |
1. Analysis and Synthesis of Passive and Active Circuits 2. Analog & SC Filters 3. Electronic-Aided Instrumentation 4. Signal Processing |
Subjects taught in the department : |
1. Electrical Networks (III) 2. Wave Shaping Techniques (IV) 3. Analog & Digital Integrated Circuits – Design & Applications (IV) 4. Principles of Control Systems (V) 5. Electronic Instrumentation (III) |
Projects guided at PhD/ PG level: |
Ph D Level: Total 03 1. B M Singhi : (1980) Some Contributions on Synthesis of Passive and Active Circuits 2. Dr Uday Pandit Khot: (2011): Synthesis of Analog Circuits employing Current-Mode Building Blocks,Jan 2010 3. Gautam Shah: (Synopsis submitted): Algorithms and Architectures for Discrete Hartley Transform There is no PG course in SFIT and therefore I have not guided any PG Project |
Projects evaluated at |
Ph D Level Total 02 1. Sampled Analog Architectures for Real Time Signal Processing, Ashis Kumar Mal, IIT Kharagpur, August 2006 2. IIT Delhi PG Level (Total 24) 1. PLL Less Active Power Filter, Roopa Manjunath, Terna Engg College, Feb 2008 |
Publication Details |
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Papers published: |
Total 203 Papers International Journals: Total 73 [1] Gautam A Shah & Tejmal S Rathore, A mixed-mode signal processing architecture for radix-2 DHT, Int J Comp Sc & Engg, vol 3, no 6, pp 1409-1418, June 2011. [2] T S Rathore & G A Shah, Miller Equivalents and their applications, Int J Circuits, Systems andSignal Processing, Birkhauser, Boston, vol 29, pp 757-768, July 2010 [3] D D Vyas & T S Rathore, Improved scheme for time multiplexing of SCs, Int J EmergingTechnologies and Applications in Engineering, Technology and Science, vol 2, no 2, pp 12-15, July-Dec 2009 [4] T S Rathore and U P Khot, CFA-based grounded capacitor operational simulation of ladder filters, Int J Circ Theory Appl, vol 36, pp 697-716, 2008
National Journals: Total 75 [1] T S Rathore and G A Shah, Matrix approach: Better than applying Miller’s equivalents, IETE J Edn, July 2010, vol 51, no 2-3, May-Dec 2010 [2] T S Rathore & U P Khot, A New Micro-Meter Displacement Sensor, J Instrument Society of India, vol 40, no 03, pp 168-169, Sept 2010 [3] T S Rathore, Applications of timer integrated circuits, IETE J Edn, vol 51, no 1, pp 33-52, Jan-April 2010
International Conf: Total 27 [1] G A Shah & T S Rathore, An analog architecture for the radix-4 DHT, UKSim 13th Int Conf on Computer Modeling & Simulation, UKSim-2011, Cambridge Univ, UK, March 30-April 1, 2011 [2] G A Shah & T S Rathore, A new architecture for radix-2 DHT, IEEE Int Conf on Computational Intelligence & Communication Networks, CICN-2010, Rajiv Gandhi Prodyogiki Vishwavidyalaya Bhopal, pp 539-543, Nov 26-28, 2010 [3] Gautam A Shah & T S Rathore, A New Position-Based Fast Radix-2 Algorithm for Computing the DHT, Int Conf on Contemporary Computing -Algorithms, JIIT University, Noida, India, Aug 17-19, 2009 [4] G A Shah & T S Rathore, A new fast radix-2 decimation in frequency algorithm for computing the DHT, 1st Int Conf on Computational Intelligence Communication Systems & Networks - Image, Speech & Signal Processing, (CICSyN 09), Indore, July 23-25, 2009 [5] Gautam A Shah and T S Rathore, Position-based method for computing the elements of the discrete Hartley transform matrix, TENCON 2008, IEEE Region 10 Conference, University of Hyderabad, Hyderabad, Nov 19-21, 2008
National Conf: Total 27 [1] T S Rathore, Miller Theorem – Scope and Limitations, National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT 2010), University of Delhi, Jan 30-31, 2010 [2] G A Shah & T S Rathore, Location-Based Method for Computing the Elements of the Discrete Hartley Transform Matrix, 14th National Conference on Communications, NCC-2008, IIT Bombay, Mumbai, Feb 1-3, 2008 [3] G A Shah & T S Rathore, Location-Based Method of Computing the Elements of the DHT Matrix, National Conf on Communications, NCC-2008, IIT Bombay, Feb 1-3, 2008 [4] T S Rathore & G A Shah, Design, Development & Applications of PC-Based Process Control Trainer for Automation, IETE Tech Review, 25, 29-37, Jan-Feb 2008
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Books published: |
Digital Measurement Techniques 1. First Print 1996 2. Second Print 2003 3. Russian Print 2004 |
Programs Attended or Conducted |
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Conferences attended |
1. National Conf on ‘Advances in Information & Communication Technology’, IETE Mumbai Centre & RGIT, Varsova, March 22-23, 2010 2. Instruction Design for e-Learning Animation, IIT Bombay, Nov 28, 2009 3. 2nd Int workshop on Electron Devices and Semi-conductor Technology, IIT Bombay, Jun 1-2, 2009 4. Int Conf on ‘Sensors, Signal processing, Communica-tion, Control & Instrumentation, Vishwakarma Inst of Tech, Pune, Jan 3-5, 2008 5. ISTE STTP on Developing Managerial Skills for Senior Technical Academicians, SFIT, Jan 5-9, 2009 |
STTP conducted |
Total 09 1. FIP-10: Question paper setting and evaluation, July 16, 2010 (Delivered a lecture) 2. Recent Advances in Electrical Networks, July 7-11, 2008 3. FIP-08: Testing and Evolution – How to conduct oral, practical and written examination, July 1, 2008 (Delivered a lecture) 4. FIP-07: Laboratory instructions, June 14, 2007 (Delivered a lecture)
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Conferences conducted |
International conferences Total 04 : 1. Nanotechnology and Health Care Applications, Jointly by IETE Mumbai Centre and IIT Bombay, 2007 2. First SFIT National Seminar on INFOCOM, 2007 3. A National Seminar on Recent Developments in Circuits, Systmes and Signal Processing, Feb 23-24, 2011, Supported by IEEE Bombay Section |
Workshops conducted |
Total 03 1. Use of articles (a, an and the) 2. Art and Science of Setting and Evaluation of question papers for Mumbai University 3. Software WinFig |
Communication with outside world |
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Nature of interaction with Mumbai University |
1. Setting question paper 2. Organized Principals meet on May 15, 2007 3. Conducted Practical Examinations 4. Orientation Program on the Experiments on Electrical Networks, August 6, 2011 5. Course Orientation Program on ‘Analog and Digital Integrated Circuits - Design and Applications’, Jan 30, 2009 6. Course Orientation Program on ‘Principles of Control Systems’, July 31, 2009 7. Workshop on ‘Industry-University Interaction and Implementation for Technology Development’, Feb 22-23, 2007 8. Workshop on The Art of Setting Question Papers and Evaluation, August 26, 2008
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Nature of interaction with other Universities |
1. Setting question papers for several universities 2. Member of Board of Studies, NMIMS University Mumbai, RGT University, Bhopal
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Visiting lectures in other colleges |
Popular lectures under IEEE Bombay Section Lecture series 1. Vidyalankar Inst of Tech, Recent Advances in Network Theorems, Sept 17, 2010 2. TSEC, Recent Advances in Network Theorems, Bandra, March 10, 2010 3. K J Somaiya College of Engineering, Sion, Recent Advances in Network Theorems, Oct 29, 2009 4. St Francis Institute of Technology, Borivali, Recent Advances in Network Theorems, 2010 5. STTP: Academic Institute & Industry Interaction, Research & Development, Watumull Institute, July 14, 2008
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Nature of interaction with outside world |
Interaction with 1. UPSC: Setting the question (subjective and objective types) papers, conducting the personality interviews, etc, Objective type paper setting: May 11-13, 2012 2. NTPC: Setting question papers for competitive examination 3. L&T: Setting the question papers 4. DSIR: Member of the PRC Committee for Rishabh Industries, Nashik to evaluate the project ‘Design, Development and Manufacture of 5 ¾ and 6 ¾ Digital Multi- Meters’ 5. BSES (now Reliance): Setting and coordinating the objective type question papers 6. UGC: Member of the Review Committee, Hindustan Inst of Tech & Science, Padur, Oct 20-22, 2009 7. IETE: Member of Exe Com, Organized several National and International Conferences 8. IEEE Bombay Section: was member of Exe Com 9. AICTE: Member on Expert Com Visit, Pravara Rural Egg College, Loni, Dec 15, 2003 10. IIT Kharagpur: Ph D Thesis Evaluation, August 2007 11. IIT Delhi: Ph D Thesis evaluation, 2004 12. IIT Bombay: In connection with JEE and GATE, resource persons for various programs
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Awards and Honors |
Awards Received: Total 10 1. IETE Best Paper Award in J of Education (2011) 2. IETE Hari Ramji Toshniwal Award (2010) 3. IETE K S Krishnan Memorial Award (2009) Honors 1. First best paper award on the paper ‘CFA Based Grounded Capacitor Operational Simulation of Ladder Filters’, published in Sanshodhan, T S Rathore & U P Khot, March 18, 2009 2. Third best paper award on the paper Hysteresis Circuits & Their Realizations, published in Sanshodhan, A A Shinde and T S Rathore, March 18, 2009 3. First best project ‘Eye Operated Mouse Pointer’ presented by Ameya Gaonkar, Kanad Eksambekar, Anjali Hegde and Hardik Sagar, at the intercollegiate technical paper presentation ‘Transmission 09’, Xavier Institute of Engineering, Mahim, Mumbai. March 6, 2009. |
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Invited talks delivered 1. Technical Paper Writing, MPSTME, NMIMS, Oct 23, 2010 2. IEEE TSEC Student Chapter, March 10, 2010 3. Miller Theorem – Scope and Limitations, National Conference on Mathematical Techniques: Emerg-ing Paradigms for Electronics and IT Industries, University of Delhi, Jan 30-31, 2010 4. Design of RC active equalizers, STTP at Watu-mull Inst of Tech, Worli, Jan 4, 2010 5. Inauguration of ISF at KJ Somaiya Inst of Engg & Inf Tech, Sion, Oct 29, 2009 6. Miller Equivalents and Their Applications, National Conference on Electronics, Communi-cations & Computers, IETE Navi Mumbai Sub Centre, Feb 13-14, 2009 7. Advances in network theorems and transforma-tions, IETE Zonal Seminar on Advances in Wired and Wireless Communication, IETE Bhopal Centre, Barkatullah Univ, Bhopal, April 26-27, 2008 8. Equalizer design for high frequency applications, IETE Zonal Seminar on Advances in Wired and Wireless Communication, IETE Bhopal Centre, Barkatullah Univ, Bhopal, April 26-27, 2008 9. Source transformation theorem revisited, inaugu-ration of ISF at St Xavier Tech Inst, Feb 7, 2008 10. Voltage-mode current mode transformation, SPIT-IEEE Colloquium and Int Conf, Andheri, Mumbai, Feb 5, 2008 11. Hysteresis circuits and their realizations, invited talk at the National Conf on Emerging Techno-logies in Control & Instrumentation, TSEC, Oct 18-19, 2007 12. Abundance of equivalent source transformation, SP College of Engineering, inauguration of ISF Sept 21, 2007
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