Invited Talks


 

                                  Title: Residue Number Systems: VLSI Architectures

                                        Speaker: P. V. Ananda Mohan
  Fellow IEEE

Abstract

  The conventional binary number system has been in extensive use in digital computers and digital signal processing since few decades. However, alternative number systems have been explored such as residue number systems, Logarithmic Number systems etc. as well. However, even though there was initial interest in late 70's, during eighties, the interest has dwindled and there is resurgence more recently in view of the various applications such as cryptography and VLSI signal processing. In this talk, we survey this area and present the state of the art and new directions. Topics such as choice of moduli sets, problems of binary to RNS conversion, RNS to binary conversion, operations such as addition, multiplication, exponentiation, scaling, base extension, comparison and error correction.  Examples will be used to explain the basic concepts.       

Biography

Dr. Ananda Mohan

Dr. Ananda Mohan obtained Ph.D degree in Electrical Communication Engineering from Indian Institute of Science, Bangalore in 1975. During 1973-2003, he was with I.T.I. Limited in R&D.  Subsequently till 2008, he was with R&D Electronics Corporation of India Limited, Bangalore. He was with N.T.R.O during 2009 and since February 2010, he is with Electronics Corporation of India Limited.  
 
        His research interests are in the area of Analog VLSI design, VLSI architectures, Residue Number Systems and Cryptography. He has published in these areas in refereed international journals and conferences. He has published three books Switched Capacitor Filters: Theory, Analysis and Design (Prentice-Hall (London)), Residue Number Systems: Algorithms and Architectures Kluwer Academic Publishers and Current-mode VLSI analog Filters: Design and applications (Birkhauser).

           He is a Fellow of IEEE (U.S.A), Fellow IETE (India), Fellow of National Academy of Engineering (India). He was Associate Editor of IEEE Transactions on Circuits and Systems Part I during 2000-2003. He is at present an Associate Editor of Circuits, Systems and Signal Processing. He has received the Ram Lal Wadhwa Gold Medal Award from the Institution of Electronics and Communication Engineers (India) in 2003 and Indira Priyadarshini Award in 2004.  He has taught at Indian Institute of Science for few years.  


 

Title: A versatile noninvasive bioimpedance sensor using digital synchronous demodulation

Speaker: Prof. Prem C. Pandey,
Electrical Engineering,
IIT Bombay

Abstract

A noninvasive monitoring of bioimpedance has the potential of serving as a low-cost diagnostic tool and monitoring device in several medical applications, e.g. impedance cardiography (sensing of variation in thoracic impedance to estimate cardiac output and some other hemodynamic parameters), pneumography (sensing of respiratory parameters), plethysmography (sensing of peripheral blood circulation), glottography (sensing of movement of vocal chords), etc. The instrumentation used passes a high-frequency low-amplitude current of through an appropriately placed electrode pair, an amplifier to sense the resulting amplitude-modulated voltage across the same or another appropriately placed electrode pair, a demodulator to detect the impedance signal, and signal processing for obtaining the desired parameters. In our work, an embedded system design approach has been used to develop a versatile noninvasive bioimpedance sensor for sensing the basal value of the impedance and the time-varying component of the impedance waveform. A microcontroller and an impedance converter chip are used for providing a stable sinusoidal source with programmable frequency and digital synchronous demodulation for very low noise and demodulation related distortions. A voltage-to-current converter with balanced outputs is designed using two operational trans-conductance amplifiers for current excitation. The sensed voltage is added with a sinusoidal voltage obtained from the excitation source and with digitally controlled amplitude and polarity to increase its modulation index before digital synchronous demodulation and for baseline correction of the sensed impedance signal. Two digital potentiometers are used to provide independent control over current excitation and baseline correction. Synchronous digital demodulation in the impedance converter chip gives real and imaginary part of the impedance. An isolated RS232 interface is provided to set the parameters and to acquire the sensed impedance signal. The design can be used for realizing a body-worn device for monitoring the clinically important hemodynamic parameters during critical care, for ambulatory recording for early diagnosis of cardiovascular disorders and for post-operative care, for monitoring of physiological parameters for use in sports medicine, and as a low-cost diagnostic aid.

Biography


Dr. Prem C. Pandey

Dr. P. C. Pandey received B.Tech in electronics engineering from Banaras Hindu University (India) in 1979, M.Tech in electrical engineering from IIT Kanpur (India) in 1981, and Ph.D. in electrical & biomedical engineering from the University of Toronto (Canada) in 1987.

In 1987, he joined the University of Wyoming (USA) as an assistant professor in electrical engineering and later joined IIT Bombay (India) in 1989, where he is a professor in electrical engineering, with a concurrent association with the biomedical engineering program. He has been a consultant to a number of industries for the development of electronic instrumentation, embedded electronic systems, audio and signal processing applications.

He has published his papers in various national and international journals and conferences.


 

Title: Inverse Neural Network (INN) Application in Bioreactor Profile Controller Design

Speaker: Sudhanshu S. Jamuar
University Malaysia Perlis,
School of Microelectronics Engineering,
02600 Arau, Perlis, Malaysia

Abstract

Bioprocesses use complete living cells or their components to obtain desired products and the biotechnology industry grown sharply in last two decades due to progress in understanding complex biological systems, availability of efficient and cost effective process control techniques, better yields and lower production cost and high demands for chemical and biologically manufactured products. In large-scale production, improved process techniques have resulted in new materials with higher yields and lower production cost. Different control strategies have been applied to improve the performance of the bioreactor. But control and optimization of bioreactor operation is still a challenging task due to extremely complex time varying process, nonlinear process dynamics, non-availability of satisfactory accurate model and slow responses to the parameter changes. Artificial Neural Networks (ANN) has been used recently to develop the controllers with learning system features to reduce the residual error and to replace conventional PID controllers. This has resulted in optimized performance of bioreactor to give higher yield. This talk presents the use of Inverse Neural Networks (INN) for optimizing the performance of bioreactor.

Biography

S. S. Jamuar received his M. Tech and Ph. D. in Electrical Engineering from Indian Institute of Technology, Kanpur, India in 1970 and 1977 respectively. He worked as Research Assistant, Senior Research Fellow and Senior Research Assistant from 1969 to 1975 at IIT Kanpur. During 1975-76, he was with Hindustan Aeronautics Ltd., Lucknow. Subsequently he joined the Lasers and Spectroscopy Group in the Physics Department at IIT Kanpur, where he was involved in the design of various types of Laser Systems. He joined as Lecturer Electrical Engineering Department at Indian Institute of Technology Delhi in 1977, where he became Assistant Professor in 1980. He was attached to Bath College of Further Education, Bath (UK), Aalborg University, Aalborg (Denmark) during 1987 and 2000. He was a Professor in the Department of Electrical Engineering at IIT Delhi from 1991 to 2003. He was Consultant to UNESCO during 1996 in Lagos State University, Lagos (Nigeria). He was with University Putra Malaysia during 1996-97 in the Faculty of Engineering. He was Professor in Electrical and Electronics Engineering Department at University Putra Malaysia (Malaysia) from 2001 to 2009 and Electrical Engineering Department at University Malaya (Malaysia) from 2009 to 2013.

Presently he is Professor in School of Microelectronics at University Malaysia Perlis (Malaysia). He has been teaching and conducting research in the areas of Electronic Circuit Design, Instrumentation and Communication Systems. He has about 40 papers in the International Journals and has attended several International Conferences and presented papers. He received Taiwan Patent on “Simulation Circuit Layout Design for Low Voltage, Low Power and High Performance Type II Current Conveyor”. He is recipient of Meghnad Saha Memorial Award 1976 from IETE, Distinguished Alumni Award from BIT Sindri in 1999, and Best paper award in IETE journal of Education 2004 from IETE. He is senior member of IEEE and Fellow of Institution of Electronics and Telecommunications Engineering (India). He is on the Editorial Board of Wireless Personnel Communication Journal. He is Organizing Chair for IEEE APCCAS2010 conference to be held in Kuala Lumpur, Malaysia. He is one of DLP speakers for the term 2008-2009 for the IEEE Circuits and System Society.


 

Title: Towards  securing Biometric  information

Speaker: Prof Aditya Abhyankar
Dean of Faculty,
University of Pune, Pune

Abstract

Securing biometric information has become essential with growing biometric applications in different sectors of society. Vulnerability assessment plays a key role in improving the security of any security system by identifying the potential vulnerabilities and proposing countermeasures to mitigate the threats posed by them. In this work self-generated and dynamic helper data based system is proposed to encrypt the biometric templates. Biometric information is statistically learned and probabilistic matching is performed to discriminate genuine from imposters. We call this system as One Time Biometric Transformation (OTBT) system. The system was tested using CASIA iris database and by probabilistic matching an EER of 1:96% is achieved. Strength analysis of the system for three different challenging databases is also presented.

Biography


Dr Aditya S Abhaynkar

He obtained his BE in Electronics & Telecommunication from University of Pune; MS & PhD in Electrical & Computer Engineering from Clarkson University, NY, USA

He Chaired IEEE North Country, USA from 2003-2004. He was a Graduate Committee Director, University Honors Delta from 2004-2005 and chaired the Professional Activities & Consulting Education (PACE) from 2005-2006. He is a consultant for NexID Biometric LLC, Morgantown, West Virginia, USA; VisionR&D, Montreal, QB, Canada and Optra Systems, India. Currently he is a Dean Research & Development; Professor- Department of Computer Engineering, Vishwakarma Institute of Information Technology, Pune.

He has over 200 publications in International Journals & Conferences; 03 Book Chapters and 06 invited magazine articles.

He is a Member of Institute of Electrical and Electronics Engineers; American Society for Engineering Education and Applied Member of ISTE.

He has been honored and awarded with 05 Patents and 03 pending; 03 Copyrights; 04 disclosures and 06 Technology Transfers.


 

Title: Web Application Security – Attacks and Defenses


Speaker: Bernard Menezes
Department of Computer Science and Engineering
IIT Bombay

 

Abstract

There are few areas of study that rival security in breadth and depth. At the technical level, security includes cryptographic algorithms and protocols, system security, application security, etc. This talk focuses on attacks on web applications - the most widespread among these are SQL injection, cross-site scripting and cross-site request forgery. We highlight various attack scenarios together with the objectives that an attacker may seek to accomplish. We also explore defenses that may be deployed in the code (by the application developer) or in the system. In the special case of cross-site scripting, defenses may be embedded in the server or the browser. We study various browser-based defense strategies on modern browsers such as Chrome and Internet Explorer. We then present our extension to the Firefox browser which successfully defends against most attack vectors.

Biography

Professor Bernard L Menezes earned a B Tech. in Electrical Engineering from IIT Bombay, an M S in Electrical and Computer Engineering from the University of Notre Dame and a PhD from the University of Texas at Austin in Electrical and Computer Engineering. He has been a professor for over 25 years.  He was a faculty member in the Electrical and Computer Engineering Department and the Institute for Advanced Computer Studies at the University of Maryland at College Park. He was also a faculty member in Mumbai University and a visiting faculty member at the University of New Mexico, Albuquerque. He is currently professor in the Department of Computer Science at IIT Bombay.

He has taught over 13 courses in Computer Science/Information Technology and supervised over 60 M S/M Tech/Ph D students across five continents. He has published widely in national and international workshops, conferences, and journals including the IEEE Transactions on Computers, the IEEE Transactions on Reliability, and the International Journal of Parallel Computing. His research interests include Network Security and Cryptography, Parallel Computing, Smart E-Business and Forecasting.

He has authored a comprehensive book on Network Security and Cryptography by Cengage Publishers.


 

St. Francis Institute of Technology